VLSI Design Engineer Resume Examples Templates For Career Growth

Alex Ellison

Vlsi Design Engineer

[email protected] | (469) 203-1515 | Dallas, Texas, USA

Profile

Highly skilled and detail-oriented VLSI Design Engineer with over 7 years of experience specializing in digital and mixed-signal integrated circuit design. Expert in RTL design, synthesis, and verification methodologies, with a strong track record of delivering complex ASIC and FPGA projects on time. Adept at collaborating across cross-functional teams to optimize silicon performance, power, and area. Proficient in leading design cycles from architectural planning through tape-out and post-silicon validation. Committed to continuous learning and leveraging emerging technologies to push the boundaries of semiconductor innovation.

Education

Bachelor of Technology in Electronics and Communication Engineering
University of Texas at Dallas, Richardson, TX
Graduated: May 2016

Master of Science in VLSI Design
Georgia Institute of Technology, Atlanta, GA
Graduated: December 2018

Licenses & Certifications

• Certified ASIC Design Engineer – IEEE, License No: ASIC202105
• Advanced FPGA Design and Verification Certification – Xilinx University Program
• SystemVerilog and UVM Verification Methodology Certification – Mentor Graphics
• Low Power VLSI Design Techniques – Coursera Professional Certificate

Work Experience

Senior VLSI Design Engineer
Intel Corporation, Austin, TX
June 2020 – Present

• Lead RTL design and verification for high-speed data communication ASICs used in next-generation 5G modems, delivering on aggressive timelines while meeting stringent power and area constraints.
• Develop and implement comprehensive testbenches using SystemVerilog and UVM, increasing verification coverage by over 40% and reducing bug escapes into silicon.
• Collaborate closely with physical design and backend teams to optimize timing closure and improve yield by 12% on advanced 7nm process technology.
• Mentor junior engineers on coding best practices, design methodologies, and debugging techniques to foster a high-performing design team.
• Contribute to architectural discussions and drive adoption of novel low-power design strategies, achieving up to 25% power savings on critical IP blocks.

VLSI Design Engineer
Broadcom Inc., Irvine, CA
January 2017 – May 2020

• Designed and verified multiple IP cores for high-speed networking switches, focusing on protocol compliance, robustness, and low latency.
• Implemented RTL code for data path units and control logic using Verilog and SystemVerilog, ensuring design scalability and maintainability.
• Performed linting, static timing analysis, and formal verification to guarantee design integrity and compliance with industry standards.
• Collaborated with software teams to integrate embedded firmware for on-chip debugging and diagnostics, improving testability of silicon chips.
• Contributed to FPGA prototyping and silicon bring-up activities, enabling early validation of hardware functionality and system-level testing.

Skills

• RTL Design: Verilog, SystemVerilog, VHDL
• Verification: UVM, SystemVerilog Testbenches, Formal Verification
• EDA Tools: Synopsys Design Compiler, Cadence Innovus, Mentor QuestaSim
• Simulation and Debugging: ModelSim, VCS, Verdi
• Low Power Design Techniques: Power Gating, Clock Gating, Multi-Vt Design
• FPGA Development: Xilinx Vivado, Altera Quartus
• Scripting Languages: Python, TCL, Perl
• Team Collaboration: Agile methodologies, Jira, Git version control

Languages

• English – Fluent (Professional working proficiency)
• Spanish – Intermediate (Conversational)
• Hindi – Native Speaker

Summary

Experienced VLSI Design Engineer specializing in ASIC and FPGA design with a passion for creating efficient and reliable integrated circuits. Known for deep technical expertise, problem-solving abilities, and leadership in design teams. Proven history of successfully managing projects from specification through silicon verification, ensuring robust and high-performance chip delivery. Adept at staying current with semiconductor technology trends and applying innovative design techniques to meet evolving industry demands.

Skilled in digital logic design, system architecture, and mixed-signal integration. Strong communicator and collaborator committed to excellence in engineering and continuous professional growth.

Extra-Curricular Activities

Active member of the IEEE Solid-State Circuits Society, regularly attending workshops and conferences to stay at the forefront of semiconductor technology advances. Volunteered as a mentor for university VLSI design competitions, helping students understand practical design challenges and industry expectations.

Contributed articles and technical blogs on FPGA optimization techniques and power-efficient design for online engineering communities. Participated in hackathons focused on hardware acceleration and AI chip design, winning accolades for innovative design solutions.

Passionate about STEM outreach, organizing seminars for high school students to inspire interest in electronics and semiconductor careers. Collaborated with local makerspaces to conduct hands-on workshops on FPGA programming and digital logic.

Courses

Completed advanced coursework in VLSI design, digital signal processing, semiconductor physics, and system architecture through reputed institutions. Highlights include Advanced Digital Design from MIT OpenCourseWare and Low Power VLSI Circuit Design from Stanford Online.

Participated in professional training on ASIC physical design flows, static timing analysis, and FPGA prototyping tools. Completed several specialized online courses in SystemVerilog and UVM verification methodology, gaining certifications that complement hands-on industry experience.

Regularly enroll in emerging technology courses such as Machine Learning for Hardware Engineers and Hardware Security in VLSI to broaden knowledge scope and maintain competitive edge.

Internships

Completed a six-month internship at Texas Instruments, focusing on embedded systems and analog mixed-signal chip design. Contributed to schematic capture, simulation, and layout verification tasks while gaining exposure to fabrication processes and device characterization.

Worked as a summer intern at Qualcomm, assisting in RTL design and verification for mobile communication chipsets. Supported senior engineers in functional verification and bug tracking, enhancing understanding of industry-grade design flows and documentation standards.

Internship experiences strengthened practical knowledge of semiconductor design tools and methodologies, bridging academic concepts with real-world engineering challenges.

Other References

Available upon request. Professional references include managers and senior engineers from Intel Corporation and Broadcom Inc. who can attest to technical expertise, project leadership, and teamwork.

Hobbies

Enthusiastic about robotics and embedded electronics, frequently designing and building custom FPGA-based projects for hobbyist competitions. Enjoys reading technical journals and publications related to semiconductor innovation and computer architecture.

Active participant in local running clubs and hiking groups, appreciating outdoor activities as a means to maintain physical and mental well-being. Passionate about photography and travel, often documenting technology events and global engineering conferences.